Heat dissipation requirements are very important in semiconductor devices, particularly as the power and the performance of devices increases. At the same time, it is important that each device be kept as small as possible. Yet achieving both desirable heat dissipation and maintaining a small device size is quite difficult. Conventional heat removal methods typically increase device size and mass considerably. Maximum heat removal is achieved by exposing the largest surface area of a heat sink possible; therefore, rather large heat sinks are commonly used.
One known method of removing heat from a semiconductor device without substantial increase in device size is the use of thermal vias. Thermal vias, for example, are used in pad array or pin grid array semiconductor devices which employ printed circuit board (PCB) substrates as part of the device package. In these devices, a semiconductor die is mounted on the PCB and is electrically coupled, for instance by wire bonds, to a pattern of conductive traces formed on the top of the PCB. Each conductive trace is routed to a corresponding trace or pad in the bottom of the PCB by a conductive via which extends through the PCB. These conductive vias are often referred to as plated through-holes. In addition to the vias which electrically couple one trace to another, "dummy" vias which are not used for electrical connection may also be included in the PCB. Typically, the dummy vias are positioned directly beneath a semiconductor die and are plated or filled with a thermally conductive material such as copper, gold, or solder. The sole purpose of the dummy vias is to dissipate heat away from the semiconductor die and into thermally conductive planes of the PCB, a heat sink, or an underlying substrate. Thus, these vias are also referred to as thermal vias.
Although the use of thermal vias can avoid the need to employ bulky heat sinks, the heat dissipation in thermal vias is significantly limited. The amount of heat which a thermal via can transfer is related to the cross-sectional area of the via. Typically, thermal vias have the same dimensions as conventional signal carrying vias, for instance 0.3 mm in diameter with a plating thickness of 0.02 mm. Thus, a thermal via has a conductive cross-sectional area of only 0.02 mm.sup.2. Thermal resistance through the via can be minimized by making the thermally conducting cross-sectional area of the via as large as possible. One method of achieving a larger cross-sectional area is by increasing the plating thickness in the thermal vias; however, beyond a certain plating thickness, the plating operation is difficult to control repeatedly. Another way to increase the effective cross-sectional area is by adding more thermal vias. But adding more vias undesirably increases the size of the device and reduces the availability of signal routing in and around the thermal vias.